TOLERA2 - (TEC2015-65902)

Variability in Nanometric technologies: Tolerance, Reliability and Benefits)


Circuits of current nanometer technologies suffer from great variabiliy both static (process
variations) and dynamic (temperature, voltage and aging). Designers can increase reliability
of these circutis by implementing specific mechanisms to deal with this variability. In this
project we first propose to design and implement robust sensors to be part of variability
monitoring networks. A key goal of this project is that the sensors must be aging and
radiation tolerant, because both variables significantly affect the performance of nanometric
circuits, even at ground level.
As pre-fabrication validation support we will develop a complex simulation framework that
can systematically and efficiently deal with the three views faced in the project: variability,
aging and radiation.
There can be also seen a positive side of variability. There are systems that require centain
randomness which can be found in the variability suffered by the circuit. This usually
happens in authentication or security systems. Another goal of this project is to design two
basic primitives in security systems: PUF (Physiscally Unclonable Functions) and RNGs
(Random Number Generators) based on variability sensors.
Finally, we will explore the potential use of emerging devices taking advantage of the
expertise of the research group on modeling and simulation of memristors. We make a step
forward and we propose the use of this kind of emerging devices to implement a variability



Journal Papers and Book Chapters

  1. Reconfigurable Writing Architecture for Reliable RRAM Operation in Wide Temperature Ranges,  F. García-Redondo; P. Royer; M. López-Vallejo; H. Aparicio; P. Ituero; C. A. López-Barrio, in IEEE Trans. on Very Large Scale Integration (VLSI) Systems ,Accepted for publication. doi: 10.1109/TVLSI.2016.2634083
  2. A 4096-Point Radix-4 Memory-Based FFT Using DSP Slices, M. Garrido, M. Á. Sánchez, M. L. López-Vallejo and J. Grajal, in IEEE Trans. on Very Large Scale Integration (VLSI) Systems, vol. 25, no. 1, pp. 375-379, Jan. 2017. doi: 10.1109/TVLSI.2016.2567784
  3. SPICE Compact Modeling of Bipolar/Unipolar Memristor Switching Governed by Electrical Thresholds, F. García-Redondo, R. P. Gowers, A. Crespo-Yepes, M. López-Vallejo and L. Jiang, in IEEE Trans. on Circuits and Systems I: Regular Papers, vol. 63, no. 8, pp. 1255-1264, Aug. 2016. doi: 10.1109/TCSI.2016.2564703
  4. A performance study of CUDA UVM vs. manual optimizations in a real-world setup: Application to a Monte Carlo wave-particle event-based interaction modeJose M. Nadal-Serrano and Marisa Lopez-Vallejo. IEEE Transactions on Parallel and Distributed Systems, Volume: 27, Issue: 6, June 1 2016

Conference papers

  1. Reliable design methodology: The combined effect of radiation, variability and temperature, F. García-Redondo, M. López-Vallejo, H. Aparicio and P. Ituero, 2016 13th International Conference on Synthesis, Modeling, Analysis and Simulation Methods and Applications to Circuit Design (SMACD), Lisbon, 2016, pp. 1-4.
  2. Taxonomy of power supply monitors and integration challenges, P. Ituero, M. Lopez-Vallejo, H. Aparicio and F. Garcia-Redondo, 2016 IEEE 21st International Mixed-Signal Testing Workshop (IMSTW), Sant Feliu de Guixols, 2016, pp. 1-6. 
  3. Calibration-free 1052 µm2 power supply monitorH. Aparicio, P. Ituero and M. López-Vallejo, 2016 12th Conference on Ph.D. Research in Microelectronics and Electronics (PRIME), Lisbon, 2016, pp. 1-4. 
  4. A temperature-independent PUF with a configurable duty cycle of CMOS ring oscillators, J. Agustin and M. L. Lopez-Vallejo, 2016 IEEE International Symposium on Circuits and Systems (ISCAS), Montreal,