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Fernando García Redondo



fgarcia@die.upm.es
GitHub

Departamento de Ingeniería Electrónica
E.T.S.I. Telecomunicación
Universidad Politécnica de Madrid
Room C.203
Phone: +34915495700 ext. 4234
Fax: +34913367323




Ph.D. working at the Integrated Systems Laboratory.
Background: 5-year Engineering degree (B.S. + MSc) in Telecommunications,
 with a major in Electronics from the Universidad Politécnica de Madrid
MSc in Electronic Systems Engineering,
from the Universidad Politécnica de Madrid

My main research lines are memristor/RRAM modeling and
simulation
,
novel circuits design and simulation approaches for neuromorphic applications and reliable circuit design including PVT and
radiation.